(1) Field of the Invention
The present invention relates to a controller for interfacing a plurality of processors through a single Small Computer System Interface (SCSI) initiator disposed within the controller to a plurality of SCSI peripheral devices. More particularly, the controller described in the present invention provides a logical connection between a plurality of processors, herein referred to as host processors, and a single SCSI initiator located within the controller. When connected to the controller, the plurality of host processors can independently communicate with a plurality of SCSI peripherals or, as defined in the American National Standards Institute (ANSI) SCSI specification, target devices through the single SCSI initiator via industry standard or user defined interfaces, protocols, and commands. Target status information is cleared from the target's memory when the initiator requests status. In the present invention this target status information is automatically sensed and stored by the controller for every host processor. The prior art system of integrating one initiator within a controller to a plurality of SCSI target devices is replaced with a new and improved system that expands the current protocol arrangement between one SCSI initiator and a plurality of SCSI targets and removes the need to add initiators as the number of host processors increases.
(2) Description of the Prior Art
Many types of peripheral devices can be interfaced to digital computers. For example, mass storage devices are used by computers to store and retrieve information. These devices utilize different types of media such as magnetic tape, magnetic disk, optical disk, or semiconductor memory. Each type of peripheral requires a unique, or device specific, interface. The American National Standards Institute has approved standard X3.131-1986, designated the Small Computer Systems Interface or SCSI-I, that allows a computer system to connect, through a device called an initiator, to a plurality of dissimilar peripheral devices, or SCSI targets, using high level device independent commands. The connection from the computer system to these targets is made through the SCSI initiator. The initiator sends commands to targets as defined in the ANSI standard, and the targets respond to these commands. ANSI standard X3.131-1986 permits one initiator to communicate with up to seven physical devices or targets in a time shared arrangement. More than one initiator can be used. However, the total number of initiators and targets cannot exceed eight. Target status conditions are reported to the requesting initiator and subsequently to the requesting processor which communicates with the initiator. In the prior art, once a target's status is reported from the target through the initiator to the processor, that status information, normally stored in the target's controller, is cleared. If another processor were to connect to the same initiator and request status information on the same target, that information would not be available. Thus, the prior art system of using one initiator for multiple processors is disadvantageous in that if one processor receives and subsequently clears all target status information, other processors connected to that initiator are unaware of any changes that may have been made in the target's status. The only system available, prior to the present invention that would retain status information and make it available to a second host processor is to add a second initiator, connect the second processor to the second initiator, and connect the second initiator to the SCSI bus. Since the total number of targets and initiators is limited, adding another initiator decreases the total number of targets that the system can handle.